ExaNoDe will investigate, develop integrate and validate the building blocks (technology readiness level 5) for a highly efficient, highly integrated, multi-way, high-performance, heterogeneous compute element aimed towards exascale computing. It will build on multiple European initiatives for scalable computing, utilizing low- power processors and advanced nanotechnologies. ExaNoDe will draw heavily on the Unimem memory and system design paradigm defined within the EUROSERVER FP7 project, providing low-latency, high-bandwidth and resilient memory access, scalable to Exabyte levels. The ExaNoDe compute element aims towards exascale compute goals through: • Integration of the most advanced low-power processors and accelerators (across scalar, SIMD, GPGPU and FPGA processing elements) supported by research and innovation in the deployment of associated nanotechnologies and in the mechanical requirements to enable the development of a high-density, high-performance integrated compute element with advanced thermal characteristics and connectivity to the next generation of system interconnect and storage; • Undertaking essential research to ensure the ExaNoDe compute element provides necessary support of HPC applications including I/O and storage virtualization techniques, operating system and semantically aware runtime capabilities and PGAS, OpenMP and MPI paradigms; • The development of a hardware emulation of interconnect to enable the evaluation of Unimem for the deployment of multiple compute elements and to leverage the potential of the ExaNoDe approach for HPC applications. Each aspect of ExaNoDe is aligned with the goals of the ETP4HPC. The work will be steered by first-hand experience and analysis of high-performance applications and their requirements; investigations being carried out with “mini-application” abstractions and the tuning of their kernels.

The COREnext project aims to build a computing architecture and digital components for sustainable and trustworthy B5G and 6G processing. This architecture must support an open, multi-vendor and multi-tenant disaggregated RAN by employing virtualization technology. A step forward in digital component design must be made to address the compute throughput and energy-efficiency requirements. This is addressed by the development of powerful and efficient heterogeneous accelerators, purpose-built for RAN computation and signal processing, as well as ultra-high-speed and low-power interconnects to support disaggregation of compute resources. A cornerstone of the project is trustworthiness. The pervasiveness of B5G and 6G use cases requires deeply embedded hardware trust anchors to fulfil the vision of secure disaggregated compute systems. To realize these goals, the project brings together major telecommunications and microelectronics players as well as academic research partners. A strategic roadmap will offer a transparent path towards future exploitation of the generated research results, fostering a continuing European strategy for the emergence of European digital capabilities in this communication-computing domain.

The main goal of Rising STARS is to enable a parallel programming framework for the development and execution of advanced large-scale Cyber Physical Systems (CPS) with High Performance Computing (HPC) and real-time requirements. Overall, there is an urgent necessity to develop run-time parallel frameworks, compatible with HPC, capable of guaranteeing that decisions made at run-time maintains the guarantees about system correctness and timing behavior. These new run-time capabilities however, cannot preclude the ability of run-times to dynamically adapt the execution to new working conditions or changing modes of operation of CPS to maximise the utilisation and performance capabilities of parallel heterogeneous architectures. A key element of the Rising STARS framework will be the incorporation of a unified, efficient and highly configurable data acquisition strategy fully integrated in the parallel programming models with the objective of improving productivity in CPS software development. Exposing the data-acquisition to the programmer (by including it into the parallel programming model) is also key to overlap data-transfers with computation. Another objective of the project is to add this capability in existing programming models for HPC and to investigate new parallel programming extensions to allow developers to define the real-time properties of the system in terms of periodicity and timing constraints. Finally, one of our main objectives is to implement several demonstration platforms to promote the main technological developments of this R&I action and their performance under realistic conditions, including Adaptive Optics for giant telescopes and SSA experiments, data processsing for SKA, and critical real-time embedded systems.

In recent years, Cyber Physical Systems (CPS) technologies have become a game changer in strategic sectors such as Automotive, Energy and Industry Automation, where Europe is a world leader. In fact, CPS is a key driver for the innovation capacity of European industries, large and small, generating economic growth and supporting meaningful jobs for citizens. CPS4EU aims to arm Europe with extensive value chain across key sectors by: 1. Strengthening CPS Technology providers, mainly European SMEs, to increase their market share and their competitiveness to become world leaders 2. Improve design efficiency and productivity and enable secure certification 3. Enabling the creation of innovative European CPS products that will strengthen the leadership and competitiveness of Europe by both large groups and SMEs 4. Large Dissemination of CPS technologies. To achieve these goals CPS4EU will: 1. Develop 4 key enabling technologies (computing, connectivity, sensing, cooperative systems) 2. Incorporate these CPS modules through pre-integrated architectures and design tools 3. Instantiate these architectures in dedicated use cases from strategic application: automotive, smart grid and industry automation 4. Improve CPS awareness and usage for all industrial sectors CPS4EU gathers major large companies (BMW, VALEO, THALES, TRUMPF, RTE, ABENGOA, LEONARDO, and SCHNEIDER ELECTRIC), a large set of innovative SMEs and world-class research centres (FHG, CEA, DLR, INRIA, KIT, CNRS) to significantly reduce the development time and certification efforts through pan European collaboration, knowledge exchange and access to the strong value chain in strategic markets, CPS4EU builds on a strong foundation in European and national initiatives. It will enable the European industry to lead strategic markets thanks to high level sharing of CPS technologies across sectors all along the value chain.