Concerted progress in energy sources, sensing, and communications are bringing closer a future in which connected smart sensors will contribute to improved health and sustainable use of resources via environmental, personal health, and process monitoring. For maximum value, data should be generated and processed through means that are reliable, but also cost effective, energy efficient, and ecologically sound. By doing the initial conditioning and processing of incoming data close to the sensor (i.e. at the edge of a sensing network), energy savings and signal integrity can be improved, at the expense of local complexity. The electronic devices performing signal conditioning, data conversion, and decision in such systems are typically realised in state-of-the art and exorbitantly expensive chip manufacturing facilities (fabs). Recent pressure on the chip supply chain has increased the appeal of exploring alternative technologies. Chief among these are thin-film processes in which electronic devices and sensing components can be manufactured at a fraction of the cost, but simultaneously with: a major drop in performance; challenges in manufacturing circuits of the required complexity; and in many cases, much higher energy requirements during operation. At Surrey, we have devised and are developing a design philosophy and associated thin-film electronic device called the source-gated transistor (SGT), with superior power efficiency, stability, and amplification compared to conventional thin-film transistors, advantages which come at the cost of further reducing the operating speed. Our recent observation shows that the best SGT performance arises when combining thin semiconductor materials of high electrical permittivity with low-permittivity dielectrics, in a design that is counterintuitive to traditional approaches but is consistent with first principles. In this project, we will demonstrate SGTs and circuits, with hitherto inaccessible levels of performance and energy efficiency, by combining the advantages of the device architecture with the material properties of suspended crystalline silicon and germanium membranes. The charge carrier mobility of these materials, vastly superior to the usual thin films, and the geometrical scaling afforded by the exceptional SGT functional features, will enable circuits that are >100x faster and >10x more energy efficient than previous SGT-based designs. By expressly merging thin-film and "traditional silicon"-based approaches, these devices will serve as unique building blocks for highly efficient wearable, point-of-care, and distributed sensing systems with built-in sensing, signal conditioning, and decision. Even as we will be using materials aligned with traditional chips, our approach will not rely on the costly state-of-the art fabrication facilities, relieving much needed manufacturing capacity for complex chips e.g. processors and AI accelerators, while delivering transformative functionality to an emerging sensor ecosystem. In this initial project, the route to manufacturing will be explored, but as a secondary concern. We will focus primarily on the demonstration of a ground-breaking concept, through innovative joining of previously disparate materials and fabrication philosophies. In a high-risk, high-reward approach, we will confirm transistor operation, not only as amplifiers and signal conditioning stages, but potentially as sensors for bio-, chemical and mechanical stimuli. We will establish design rules and guidelines, supported by numerical simulation and by material and device characterisation. Thus, these advances will holistically represent a toolkit for the implementation of highly versatile, multipurpose sensing and processing systems towards a connected future beyond the Internet-of-Things. As a catalyst for prolific academic and industrial advances, the research will contribute firmly to maintaining the UK's leadership in emerging electronic technologies.

The Fellow and his team are seeking to develop a ground-breaking electronic device named the multimodal transistor. Arising from more than a decade of experience in unconventional device design, it allows for entirely new applications such as hardware learning, analog computation and control, while being energy efficient and easy to fabricate. News headlines in electronic devices usually hail developments in nanoscale billion-transistor chips, yet there are major opportunities for innovation in display screen technologies, in which the requirement of fabricating circuits at low cost over large areas, and not ultimate miniaturization, is prevalent. Existing fabrication facilities are now partly being repurposed for emerging large area electronic (LAE) applications: microfluidics, lab-on-a chip, ubiquitous sensors or wearable electronics. LAE usually contain large arrays of relatively simple circuits with few transistors, as areal performance variations impede the fabrication of complex circuits. Incremental progress in LAE is constantly achieved through processes and equipment improvements, and by using new materials with superior properties, both with large capital investment. The Fellow proposes a major step in LAE development, a radical new device design: the multimodal transistor (MMT). The MMT enables new ways of designing electronic circuits for efficient analog operations (amplification, data conversion, analog computation), control and feedback, and ultimately, LAE circuits capable of learning (hardware AI), so far impractical with conventional devices and techniques. Functionality is achieved using energy-efficient circuits of minimal complexity, allowing environmentally friendly fabrication at low cost. By greatly expanding the design possibilities, while being entirely compatible with conventional LAE fabrication, MMT circuits extend the usable lifetime of current manufacturing technologies, maximising the return on investment, and can accelerate the uptake of emerging processes such as 2D semiconductors and spatial atomic layer deposition. The Fellow's team will leverage our long experience in device design and the complementary capabilities of our international partners to design, fabricate and test devices and circuits using vacuum processing and additive manufacturing in conventional and emergent semiconductor systems, supported by state-of-the-art numerical simulation. The team will use their extensive collaborator networks to seed the development of a new electronic design paradigm. As this is an enabling technology, its applications span fields from disposable medical diagnostics and crop monitoring to autonomous vehicle control, new forms user interfaces and immersive entertainment environments, with substantial long term economical and public benefits for the UK and the world. The implications of the novel functionality, such as hardware AI and autonomy, will be a constantly considered. Stakeholders will be involved in shaping the research through cross-disciplinary workshops, online engagement and science festival participation. The focus on people will further include: continuing a decade-long tradition of training, mentoring and involving school students in the Fellow's research; supporting a strong start to the careers of young researchers involved through mentoring, independence and due to the ground-breaking nature of the work; and incorporating the findings into Surrey's teaching curriculum to increase our graduates' employability. The Fellowship will accelerate the Fellow's growth as an international technical and thought leader, while retaining valuable skills, intellectual property and know-how in the UK at a time of global uncertainty. A Fellowship is the optimal funding route, allowing full commitment to advancing this trailblazing design paradigm, within a robust structure and collaborative environment which includes world-leading research facilities and support networks.