Semi-insulating silicon substrates would be very attractive as handle wafers in Silicon On Insulator (SOI) technologies because they would provide very low-absorption substrates for RF and monolithic microwave integrated circuits. Two of the investigators have previously theoretically analysed the effect of different deep level impurities on silicon resistivity and shown that a resistivity of nearly 100kOhm.cm should be achievable by dopant compensation. This theoretical work has been supported by our recently published experimental feasibility study that has delivered a very promising resistivity value of 12kohm.cm using Mn as the deep level impurity. This proposal aims to study the science and engineering of high resistivity silicon substrates for high frequency integrated circuits. The team encompasses expertise on the materials science of deep level impurities (University of Oxford), on the physics and technology of high frequency silicon devices (University of Southampton), on silicon wafer growth (MEMC) and on the design and fabrication of high frequency integrated circuits (Zarlink). The project aims to better understand the diffusion and doping vs resistivity relations of appropriate deep level impurities (including Mn), and hence to maximise the resistivity of the silicon handle wafer. Contamination issues arising from the deep level impurities will be addressed by investigating diffusion barriers and also by developing a back-end processing approach that takes advantage of the high diffusivity of some deep level impurities. The recent incorporation of Cu metallization into back-end silicon production processes suggests that other deep level impurities would not be seen by industry as a major contamination issue in back-end processing. Finally, SOI wafers will be fabricated on semi-insulating silicon substrates and detailed high frequency characterisation carried out.

Increasing energy demands, exhaustion of easily accessible oil resources and fears of climate change make renewable energy sources a necessity. Although it is evident that future power generation will result from a wide mix of technologies, photovoltaic cells have made astounding technical and commercial progress in recent years. Over the last decade renewable energy generation has been stimulated by tax concessions and feed-in tariffs. Large scale manufacturing of photovoltaics has benefited from this and progress along the learning curve necessary to achieve economies of scale in manufacture has been very rapid. However like all renewable energy sources today the cost per kWh of electricity from photovoltaics is greater than that generated by fossil fuels, although the gap has reduced quite dramatically in the last two years. The cost reductions in generation from photovoltaics have been achieved through innovative cell design, the use of lower cost materials, advances in power management electronics and lower profit margins. At the moment, >85% of new installations use wafered silicon cells of multi-crystalline or single crystal material. In these cases a key issue has been developing technologies which use thinner slices (using less silicon for a given area of solar panel) and moving to "solar grade" silicon. This type of silicon is less pure than the electronic grade used for integrated circuits and is cast into multi-crystalline ingots but it is very much cheaper. This is an important issues because before these developments as much as 50% of the cost of a cell could be attributed to the silicon material. An important cost reduction per kWh delivered has been achieved in this way despite solar grade silicon producing cells of lower conversion efficiency than electronic grade material. Further substantial reductions in cost could be achieved by using silicon produced by less energy hungry metallurgical processes, for example starting the manufacturing process by the reduction of quartz with carbon and applying low energy purification processes. This type of silicon, known as upgraded metallurgical silicon, is even less pure containing compensated dopants and metals which can act as important recombination centres so reducing the efficiency further. The aim of this proposal is to develop methodologies which are able to bring the efficiency of cells made from these cheap forms of silicon close to the efficiencies achieved from the higher cost electronic grade material. This could increase the efficiency of multi-crystalline solar grade silicon by around 5% absolute and even more in the case of upgraded metallurgical silicon. Current silicon cell structures work well because hydrogen (usually from the silicon nitride antireflection layer) passivates surfaces and bulk defects. In electronic grade single crystal this reduces recombination to insignificant levels. It doesn't work as well in solar grade multi-crystalline silicon or upgraded metallurgical silicon because there are regions, sometimes entire crystal grains, which are not passivated by the hydrogen. However other regions are of very high quality often as good as electronic grade silicon. We associate the resistance to passivation with specific types of defect observed in lifetime maps of slices. In this project we plan to identify the defects which show resistance to hydrogen passivation by using electronic and chemical techniques (carrier lifetime, Laplace deep level transient spectroscopy, SIMS, Raman spectroscopy and defect modeling). The key part of the proposal is to use our knowledge of defect reactions in silicon to develop alternative passivation chemistries which can be applied, during slice or cell production, to those defect species resistant to hydrogen passivation. In this way we would expect to make a very important improvement to the efficiency of the dominant solar PV technology.

Photovoltaic Solar Cells seem certain to make a significant contribution to the world's energy needs in the 21st Century. At the present time such devices only convert a small part of the 1kW per square meter of radiation from the sun which falls on the earth's surface into electricity. Typical commercial silicon devices that use un-concentrated sunlight are less than 15% efficient although laboratory devices with efficiencies as high as 24% have been made. Many very interesting ideas have been put forward for higher efficiency 3rd generation cells but most of these are a very long way from commercial realization on a large economic scale. At the present time 90% of production is based on wafered silicon (Czochralski single crystal or cast poly-crystalline). The predicted production for 2010 using existing silicon technology will have a peak output of 26GW. Unfortunately in their initial few hours of operation most silicon solar cells suffer from degradation which stabilizes after a reduction in efficiency of 10% relative ie a 20% cell becomes an 18% cell. In the context of total photovoltaic power lost on a world scale this is very significant. It is believed that the reduction in efficiency is due to a defect reaction in the silicon in which oxygen dimers diffuse to the boron dopant to form a powerful recombination centre. The problem is not restricted to the commercial devices of the next decade but is also highly relevant to some of the most promising third generation (high efficiency) cells which use silicon as part of the active structure. This research proposal aims to eliminate the degradation process by removing the reaction path from the silicon prior to the formation of the recombination centre. An essential pre-requisite to this is to achieve a detailed understanding of the defect centres and their formation.We have previously studied the oxygen dimers which are currently thought to be the precursors of the recombination centre. These can be detected using optical absorption measurements, ideally at low temperatures (~10K). Preliminary work indicates that it should be possible to develop treatments of the silicon material which reduce the concentration of the dimers to a negligible level in the finished cell and, because the dimers do not form at normal operating temperatures, so eliminate the formation of the defect. It would be quite feasible using this approach to maintain the concentration of interstitial oxygen which provides mechanical strength to the silicon with consequent yield and cost benefits. In this work the recombination centre will be studied using minority carrier Laplace Deep Level Spectroscopy and its structure determined by the application of uniaxial stress. The reaction of the oxygen dimer will be studied as the recombination centre forms, in real time, using optical absorption techniques. The work will be done in collaboration with MEMC who are one of the leading manufactures of solar silicon, the Institut fr Solarenergieforschung Hameln/Emmerthal (ISFH) in Germany who have undertaken much experimental work recently on solar cell degradation and the University of Aveiro in Portugal who will collaborate on theoretical calculations to support the Manchester work.

Semi-insulating silicon substrates would be very attractive as handle wafers in Silicon On Insulator (SOI) technologies because they would provide very low-absorption substrates for RF and monolithic microwave integrated circuits. Two of the investigators have previously theoretically analysed the effect of different deep level impurities on silicon resistivity and shown that a resistivity of nearly 100kOhm.cm should be achievable by dopant compensation. This theoretical work has been supported by our recently published experimental feasibility study that has delivered a very promising resistivity value of 12kohm.cm using Mn as the deep level impurity. This proposal aims to study the science and engineering of high resistivity silicon substrates for high frequency integrated circuits. The team encompasses expertise on the materials science of deep level impurities (University of Oxford), on the physics and technology of high frequency silicon devices (University of Southampton), on silicon wafer growth (MEMC) and on the design and fabrication of high frequency integrated circuits (Zarlink). The project aims to better understand the diffusion and doping vs resistivity relations of appropriate deep level impurities (including Mn), and hence to maximise the resistivity of the silicon handle wafer. Contamination issues arising from the deep level impurities will be addressed by investigating diffusion barriers and also by developing a back-end processing approach that takes advantage of the high diffusivity of some deep level impurities. The recent incorporation of Cu metallization into back-end silicon production processes suggests that other deep level impurities would not be seen by industry as a major contamination issue in back-end processing. Finally, SOI wafers will be fabricated on semi-insulating silicon substrates and detailed high frequency characterisation carried out.